A sigma-delta modulator is a circuit that is used to convert an input voltage, such as an analog signal, into a digital signal, and may be used as an analog to digital converter (ADC).
FIG. 1 (Circuit Diagram by Puffingbilly/https://en.wikipedia.org/wiki/Delta-sigma_modulation/CC BY-SA 4.0/redrawn and labelled) shows a sigma-delta modulator 10 in accordance with the prior art. The sigma-delta modulator 10 comprises an integrator circuit 12, a switching circuit 14, a comparator 16, a flip flop 18, a gate 20, a sigma counter 22, a buffer 24, a summing interval counter 26 and a clock 28.
The integrator circuit 12 comprises an op amp 30, a first capacitor 32 and a first resistor 34. A negative input of the op amp 30 receives an input voltage Vin via the first resistor 34. A positive input of the op amp 30 is coupled to ground. An output of the op amp 30 is coupled to the negative input via the first capacitor 32. The output of the op amp 30 is coupled to a first input of the comparator 16, which has a second input coupled to ground.
The switching circuit 14 comprises a second resistor 36, a third resistor 38 and a switch 40. The switch 40 couples a reference voltage −Vref0 to ground via the second resistor 36 when it is in a first state and couples the reference voltage −Vref0 to the negative input of the op amp 30 via the third resistor 38 when it is in a second state.
An alternative integrator circuit and switching circuit arrangement 42 is also shown. An alternative switching circuit 44 comprising a fourth resistor 46. The integrator circuit 12 is as previously described. Common features between drawings are represented by common reference numerals and variables.
In operation and beginning in a state where −Vref0 is coupled to the second resistor 36 via the switch 40, the input voltage Vin is applied to the integrator circuit 12. If the input voltage Vin is positive, then an output voltage Vint_out of the integrator circuit 12 will decrease with time. The output voltage Vint_out drives the comparator 16 and if Vint_out falls below a threshold voltage value of the comparator 16, an output voltage Vcomp_out of the comparator 16 will be a high signal. The comparator 16 outputs the output voltage Vcomp_out to an input D of the flip flop 18. The high signal received at the input D is provided to, and output by, an output Q at the next clock pulse of a clock signal provided by the clock 28. The output Q is provided to the switch 40 as an impulse signal (labelled impulse). The switch 40 then changes state such that −Vref0 is coupled to the third resistor 38 via the switch 40.
A current of −Vref0/R3 where R3 is the resistance of the third resistor 38, is then injected into the integrator circuit 12. If the input voltage Vin is less than the reference voltage Vref0, the output voltage Vint_out will increase with time until the threshold voltage is crossed and the switch 40 changes to a state where −Vref0 is coupled to the second resistor 36. If the input voltage Vin is greater than the reference voltage Vref0 then the slope of Vint_out will remain negative until it saturates.
Using this method, the output voltage Vcomp_out of the comparator 16 is a pulse-width modulated (PWM) signal with a duty cycle that is linearly proportional to the input voltage Vin.
The role of the remaining circuit components, namely the gate 20, the sigma counter 22, the buffer 24, the summing interval counter 26 is to convert the input voltage Vin into a digital value.
The digital value is a number of clock counts over which the output voltage Vcomp_out of the comparator is a logic 1 (a high signal) during a summing interval. The clock counts are as provided by the clock signal that is provided by the clock 28. The summing interval a total number of clock counts over which a measurement is taken. For example, a digital value of 400 during a summing interval of 1000 clock counts means that the input voltage Vin was at 400/1000 of an input voltage scale.